This invention relates to methods of forming integrated circuitry, to semiconductor processing methods, and to processing methods of forming MRAM circuitry.
Semiconductor wafer processing in the fabrication of integrated circuitry typically includes the formation of contact openings within insulating layers to underlying conductive structures. Currently, such processing is typically conducted by photolithography wherein a masking layer is deposited and a desired pattern of openings is formed therethrough. The masking layer is then used as a mask while chemical etching is conducted through the mask openings into the underlying insulative material to etch it largely selective to the masking layer such that the openings can be extended through the insulating material to the conductive structures therebeneath.
In some applications, the underlying insulative material can be thicker on some portions of the die than on other portions. This can create problems in the etch of the contact openings as the material underlying the insulative material will be exposed to the etching conditions longer where the insulative material is thinnest as compared to where such is thickest. In such instances, it might be desirable to use a thin etch stop layer as the lowestmost portion of the insulative material. Then, an etch chemistry is selected which will essentially stop on the etch stop material layer. Accordingly, etch stop material remaining over the material where a contact is desired will be of roughly the same thickness across the die. The etch stop material is subsequently removed. Silicon carbide is one such material. However, such material typically is very tenaciously adhered to the substrate in part due to its exposure to high temperatures to which the substrate is typically exposed during subsequent processing prior to the time of its desired removal. While this is good from its functioning as an etch stop layer, it is not so good when it comes time to remove it from the substrate. Presently, such is removed by a rather nonselective primarily physical sputtering action using a combination of NF3, Cl2 and Ar as opposed to by chemical action.
The following invention was motivated in addressing the above identified problems, although the invention is in no way so limited. The invention is limited only by the accompanying claims as literally worded without limiting reference to the specification, and in accordance with the doctrine of equivalence.
The invention includes methods of forming integrated circuitry, semiconductor processing methods, and processing methods of forming MRAM circuitry. In one implementation, a method of forming integrated circuitry includes chemical vapor depositing a silicon carbide comprising layer over a substrate at a temperature of no greater than 500xc2x0 C. Plasma etching is conducted through at least a portion of the silicon carbide comprising layer using a gas chemistry comprising oxygen and hydrogen.
In one implementation, a semiconductor processing method includes chemical vapor depositing a silicon carbide comprising layer over a semiconductor substrate at a temperature of no greater than 500xc2x0 C. An insulative material is formed over the silicon carbide comprising layer. A contact opening is etched through the insulative material to proximate the silicon carbide comprising layer. Plasma etching is conducted within the contact opening through the silicon carbide comprising layer using a gas chemistry comprising oxygen and hydrogen to extend the contact opening through the silicon carbide comprising layer and under conditions which etches the silicon carbide comprising layer at a rate at least twice that of any etching of the insulative material.
In one implementation, a process of forming MRAM circuitry includes forming an MRAM cell comprising magnetic material over a substrate. A silicon carbide comprising layer is chemical vapor deposited over the MRAM cell at a temperature of no greater than 500xc2x0 C. An insulative material is formed over the silicon carbide comprising layer. A contact opening is etched through the insulative material using the silicon carbide comprising layer as an etch stop. Plasma etching is conducted within the contact opening through the silicon carbide comprising layer using a gas chemistry comprising oxygen and hydrogen to extend the contact opening through the silicon carbide comprising layer to the magnetic material of the MRAM cell, and under conditions which etches the silicon carbide comprising layer at a rate at least twice that of any etching of the insulative material.
In one implementation, a semiconductor processing method includes chemical vapor depositing a silicon carbide comprising layer over a semiconductor substrate at a temperature of no greater than 500xc2x0 C. An insulative material is formed over the silicon carbide comprising layer. Resist is formed over the insulative material. A mask opening is formed within the resist to proximate the insulative layer. A contact opening is etched through the insulative material through the mask opening to proximate the silicon carbide comprising layer. In a common etching step and with the resist on the substrate, a) plasma etching is conducted within the contact opening through the silicon carbide comprising layer using a gas chemistry comprising oxygen and hydrogen to extend the contact opening through the silicon carbide comprising layer and under conditions which etch the silicon carbide comprising layer at a rate at least twice that of any etching of the insulative material, and b) plasma etching of all resist from the substrate is conducted.